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gmx::CpuInfo Class Reference

#include <gromacs/hardware/cpuinfo.h>

Description

Detect CPU capabilities and basic logical processor info.

This class provides a lot of information about x86 CPUs, and some very limited information about other hardware. The logical processor information is only available on x86, and is used as a fallback implementation in the HardwareTopology class. If you actually need information about the hardware topology, use the much more general implementation in the HardwareTopology class instead, since that will both be more portable and contain more information.

Classes

struct  LogicalProcessor
 Entry with basic information for a single processing unit. More...
 

Public Types

enum  SupportLevel { SupportLevel::None, SupportLevel::Name, SupportLevel::Features, SupportLevel::LogicalProcessorInfo }
 Amount of cpu information present (incremental) More...
 
enum  Vendor {
  Vendor::Unknown, Vendor::Intel, Vendor::Amd, Vendor::Fujitsu,
  Vendor::Ibm, Vendor::Arm, Vendor::Oracle, Vendor::Hygon,
  Vendor::RiscV32, Vendor::RiscV64, Vendor::Loongson
}
 Processor/system vendors. More...
 
enum  Feature {
  Feature::X86_Aes, Feature::X86_Amd, Feature::X86_Apic, Feature::X86_Avx,
  Feature::X86_Avx2, Feature::X86_Avx512F, Feature::X86_Avx512PF, Feature::X86_Avx512ER,
  Feature::X86_Avx512CD, Feature::X86_Avx512BW, Feature::X86_Avx512VL, Feature::X86_Avx512BF16,
  Feature::X86_Avx512secondFMA, Feature::X86_Clfsh, Feature::X86_Cmov, Feature::X86_Cx8,
  Feature::X86_Cx16, Feature::X86_F16C, Feature::X86_Fma, Feature::X86_Fma4,
  Feature::X86_Hle, Feature::X86_Htt, Feature::X86_Intel, Feature::X86_Lahf,
  Feature::X86_MisalignSse, Feature::X86_Mmx, Feature::X86_Msr, Feature::X86_NonstopTsc,
  Feature::X86_Pcid, Feature::X86_Pclmuldq, Feature::X86_Pdcm, Feature::X86_PDPE1GB,
  Feature::X86_Popcnt, Feature::X86_Pse, Feature::X86_Rdrnd, Feature::X86_Rdtscp,
  Feature::X86_Rtm, Feature::X86_Sha, Feature::X86_Sse2, Feature::X86_Sse3,
  Feature::X86_Sse4A, Feature::X86_Sse4_1, Feature::X86_Sse4_2, Feature::X86_Ssse3,
  Feature::X86_Tdt, Feature::X86_X2Apic, Feature::X86_Xop, Feature::Arm_Neon,
  Feature::Arm_NeonAsimd, Feature::Arm_Sve, Feature::Ibm_Qpx, Feature::Ibm_Vmx,
  Feature::Ibm_Vsx, Feature::Fujitsu_HpcAce, Feature::X86_Hygon
}
 List of CPU features. More...
 

Public Member Functions

SupportLevel supportLevel () const
 Check what cpu information is available. More...
 
Vendor vendor () const
 Enumerated value for vendor.
 
const std::string & vendorString () const
 String description of vendor: More...
 
const std::string & brandString () const
 String description of processor.
 
int family () const
 Major version/generation of the processor.
 
int model () const
 Middle version of the processor.
 
int stepping () const
 Minor version of the processor.
 
bool feature (Feature f) const
 Check for availability of specific feature. More...
 
const std::set< Feature > & featureSet () const
 Set of all supported features on this processor. More...
 
const std::vector
< LogicalProcessor > & 
logicalProcessors () const
 Reference to processing unit topology. More...
 

Static Public Member Functions

static CpuInfo detect ()
 Perform detection and construct a CpuInfo class from the results. More...
 
static const std::string & featureString (Feature f)
 String description of a specific feature. More...
 

Member Enumeration Documentation

enum gmx::CpuInfo::Feature
strong

List of CPU features.

These values can be used as arguments to the feature() method to check whether a specific feature was found on the CPU we are running on.

Enumerator
X86_Aes 

x86 advanced encryption standard accel.

X86_Amd 

This is an AMD x86 processor.

X86_Apic 

APIC support.

X86_Avx 

Advanced vector extensions.

X86_Avx2 

AVX2 including gather support (not used yet)

X86_Avx512F 

Foundation AVX-512 instructions.

X86_Avx512PF 

Extended gather/scatter for AVX-512.

X86_Avx512ER 

AVX-512 exponential and reciprocal extensions.

X86_Avx512CD 

Memory conflict-detection for AVX-512.

X86_Avx512BW 

AVX-512 byte and word instructions.

X86_Avx512VL 

AVX-512 vector length extensions.

X86_Avx512BF16 

AVX-512 BFloat16 instructions.

X86_Avx512secondFMA 

AVX-512 second FMA unit.

X86_Clfsh 

Supports CLFLUSH instruction.

X86_Cmov 

Conditional move insn support.

X86_Cx8 

Supports CMPXCHG8B (8-byte compare-exchange)

X86_Cx16 

Supports CMPXCHG16B (16-byte compare-exchg)

X86_F16C 

Supports 16-bit FP conversion instructions.

X86_Fma 

Fused-multiply add support (mainly for AVX)

X86_Fma4 

4-operand FMA, only on AMD for now

X86_Hle 

Hardware lock elision.

X86_Htt 

Hyper-Threading enabled (NOTE: might not match the CPUID HTT support flag)

X86_Intel 

This is an Intel x86 processor.

X86_Lahf 

LAHF/SAHF support in 64 bits.

X86_MisalignSse 

Support for misaligned SSE data instructions.

X86_Mmx 

MMX registers and instructions.

X86_Msr 

Supports Intel model-specific-registers.

X86_NonstopTsc 

Invariant TSC (constant rate in ACPI states)

X86_Pcid 

Process context identifier support.

X86_Pclmuldq 

Carry-less 64-bit multiplication supported.

X86_Pdcm 

Perfmon and Debug Capability.

X86_PDPE1GB 

Support for 1GB pages.

X86_Popcnt 

Supports the POPCNT (population count) insn.

X86_Pse 

Supports 4MB-pages (page size extension)

X86_Rdrnd 

RDRAND high-quality hardware random numbers.

X86_Rdtscp 

Serializing rdtscp instruction available.

X86_Rtm 

Restricted transactional memory.

X86_Sha 

Intel SHA extensions.

X86_Sse2 

SSE 2.

X86_Sse3 

SSE 3.

X86_Sse4A 

SSE 4A.

X86_Sse4_1 

SSE 4.1.

X86_Sse4_2 

SSE 4.2.

X86_Ssse3 

Supplemental SSE3.

X86_Tdt 

TSC deadline timer.

X86_X2Apic 

Extended xAPIC Support.

X86_Xop 

AMD extended instructions, only AMD for now.

Arm_Neon 

32-bit ARM NEON

Arm_NeonAsimd 

64-bit ARM AArch64 Advanced SIMD

Arm_Sve 

ARM Scalable Vector Extensions.

Ibm_Qpx 

IBM QPX SIMD (BlueGene/Q)

Ibm_Vmx 

IBM VMX SIMD (Altivec on Power6 and later)

Ibm_Vsx 

IBM VSX SIMD (Power7 and later)

Fujitsu_HpcAce 

Fujitsu Sparc64 HPC-ACE.

X86_Hygon 

This is a Hygon x86 processor.

Amount of cpu information present (incremental)

Enumerator
None 

No cpu information whatsoever. Sorry.

Name 

Only vendor and/or brand is set.

Features 

Some features are set.

LogicalProcessorInfo 

Everything includling logical processor information.

enum gmx::CpuInfo::Vendor
strong

Processor/system vendors.

Enumerator
Unknown 

Unidentified.

Intel 

GenuineIntel.

Amd 

AuthenticAMD.

Fujitsu 

Only works on Linux (parsed from /proc/cpuinfo)

Ibm 

Only works on Linux (parsed from /proc/cpuinfo)

Arm 

Only works on Linux (parsed from /proc/cpuinfo)

Oracle 

Cannot detect anything else yet (no /proc/cpuinfo available)

Hygon 

HygonGenuine.

RiscV32 

RISC-V 32 bit.

RiscV64 

RISC-V 64 bit.

Loongson 

Loongson.

Member Function Documentation

CpuInfo gmx::CpuInfo::detect ( )
static

Perform detection and construct a CpuInfo class from the results.

Note
The detection should generally be performed again in different contexts. This might seem like overkill, but there are systems (e.g. Arm) where processors can go completely offline during deep sleep, so at least in theory it is good to have a possibility of forcing re-detection if necessary.
bool gmx::CpuInfo::feature ( Feature  f) const
inline

Check for availability of specific feature.

Parameters
ffeature to query support for
Returns
True if the feature is available, otherwise false.
const std::set<Feature>& gmx::CpuInfo::featureSet ( ) const
inline

Set of all supported features on this processor.

This is only intended for logfiles, debugging or similar output when we need a full list of all the features available on the CPU.

const std::string & gmx::CpuInfo::featureString ( Feature  f)
static

String description of a specific feature.

Exceptions
std::out_of_rangeif the feature is not present in the internal map of feature names. This can only happen if we extend the enum type but forget to add the string with the feature name.
const std::vector<LogicalProcessor>& gmx::CpuInfo::logicalProcessors ( ) const
inline

Reference to processing unit topology.

Only a few systems (e.g. x86) provide logical processor information in cpuinfo. This method returns a reference to a vector, whose length will either be zero (if topology information is not available) or the number of processing units on which we were allowed to execute, as defined e.g. by cpu sets.

This is only meant to be use as a fallback implementation for our HardwareTopology class; any user code that needs access to hardware topology information should use that class instead.

Note
For clarity, it is likely better to use the supportLevel() method to check if this information is available rather than relying on the length of the vector.
SupportLevel gmx::CpuInfo::supportLevel ( ) const
inline

Check what cpu information is available.

The amount of cpu information that can be detected depends on the OS, compiler, and CPU, and on non-x86 platforms it can be fragile. Before basing decisions on the output or warning the user about optimizations, you want to check whether it was possible to detect the information you need.

const std::string & gmx::CpuInfo::vendorString ( ) const

String description of vendor:

Exceptions
std::out_of_rangeif the vendor is not present in the internal map of vendor names. This can only happen if we extend the enum type but forget to add the string with the vendor name.

The documentation for this class was generated from the following files: